Details

FINFET VS 32NM CONVENTIONAL MOSFET USING DEVICE SIMULATION

Dolly Kamboj

Department of ECE, GRIMT, Radaur, (YNR) Kurukshetra University, Haryana

Parveen Kumar

A.P, Department of ECE, GRIMT, Radaur, (YNR) Kurukshetra University, Haryana

Sumit Choudhary

A.P Department of Electronics Sciences Kurukshetra University, Haryana

91-98

Vol: 5, Issue: 4, 2015

Receiving Date: 2015-08-25 Acceptance Date:

2015-09-21

Publication Date:

2015-10-22

Download PDF

Abstract

FinFET devices used to replace conventional MOSFET with decrease in threshold voltage hence reduced the power consumption. SOI technology used for the devices i.e. FinFET. We provide a comparison of 32nm FinFET with conventional MOSFET. 32nm FinFET based on SOI gives better output results i.e. reduced threshold voltage, controlling leakage, minimize short channel effect over 32nm conventional MOSFET. To overcome the short channel effect, a suitable threshold voltage is required with the scaling trend in device dimension. Independent gating of the finFET’s double gate provides reduction in leakage current.

Keywords: Telephone ; Independent ; conventional ; reduced threshold voltage

References

  1. D. K. Ferry and S. M. Goodnick, ―Transport in Nanostructures (Cambridge Studies in Semiconductor Physics and Microelectronic Engineering, 1997)‖.
  2. Dragica Vasileska and Stephen M. Goodnick, Computational Electronics Department of Electrical Engineering, Arizona State University
  3. SILVACO International, Santa Clara, CA, DEVEDIT User’s Manual, 2013
  4. SILVACO International, Santa Clara, CA, DECKBUILD User’s Manual, 2013
  5. SILVACO, TONYPLOT User’s Manual, Ver. 3.0, July 8, 2013
  6. SILVACO, ATLAS User’s Manual, Ver. 4.0, May 16, 2014
  7. Ahmet Bindal, David Parent, Lili He, Salih Kilic, Comp Eng and Electrical Eng Dept San Jose State University, San Jose CA 95912, Oct 2004, ―A MOSFET design laboratory‖.
  8. Rahul Kr. Singh, Amit Saxena, Mayur Rastogi Deptt. of E& C Engg., International Journal of Engineering Sciences & Emerging Technologies, May 2011, ―Silicon on insulator technology review‖.
  9. IEEE Transactions on electron devices, Vol. 47, No. 12, December 2000, ―FINFET—A Self-Aligned Double-Gate MOSFET Scalable to 20 nm‖.
  10. Chenming Hu Dept. of EECS, University of California, Berkeley, Ca., USA, ―3D FINFET and other sub-22nm Transistors‖.
  11. A Godoy, J.A.Lopez Villanueva, J.A.Jimenez-Tejada, A.Palma, F.Gamiz, ―A simple sub threshold swing model for short channel MOSFETs‖, Solid state Electronics 2001, P 391- 397 .
Back

Disclaimer: Indexing of published papers is subject to the evaluation and acceptance criteria of the respective indexing agencies. While we strive to maintain high academic and editorial standards, International Journal of Research in Science and Technology does not guarantee the indexing of any published paper. Acceptance and inclusion in indexing databases are determined by the quality, originality, and relevance of the paper, and are at the sole discretion of the indexing bodies.

We are one of the best in the field of watches and we take care of the needs of our customers and produce replica watches of very good quality as per their demands.